Serializer/Deserializer (SerDes) circuits have been helping semiconductors move data around for years, but new process technologies are forcing it to adapt and change in unexpected ways. Traditionally ...
A critical issue with any Field Programmable Gate Array (FPGA) design is Simultaneous Switching Output (SSO) noise. SSO noise, also known as ground bounce, is a result of large instantaneous changes ...
Editor's note: The following article shows how you can minimize power consumption for SerDes blocks. A related sidebar provides more insight on how the trend towards serial I/O is driving SerDes ...
400 Gigabit Ethernet (400GbE) and 200 Gigabit Ethernet (200GbE) are currently slated for official release by the IEEE P802.3cd Task Force in December 2017. Although there is not yet an official IEEE ...
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